Wireless systems typically include a transmitter and receiver coupled to an antenna to send and receive Radio Frequency (RF) signals. Generally, a baseband system generates a digital signal that includes encoded information (data), and the digital signal is converted to an analog signal for transmission. The analog signal is processed and typically modulated (up converted) to an RF carrier frequency. After up conversion, the RF signal is coupled to an antenna through a power amplifier. The power amplifier increases the signal power so that the RF signal can communicate with a remote system, such as a base station, for example.
In one example conventional power amplifier, the emitter of the core transistor is connected to a printed circuit board (PCB) ground layer through a backvia of GaAs Die and vias in PCB. A capacitor and an inductor are included in the design to provide impedance matching with the load. The arrangement of the conventional power amplifier includes a loop, where a first node of the matching inductor is coupled to the collector of the core transistor, and the matching capacitor is coupled to the other node of the matching inductor. The matching capacitor couples the second node of the inductor to vias in the PCB. Vias in the PCB are coupled to backvias of the GaAs die, which are coupled to the emitter of the core transistor. Or put another way, the LC matching circuit is part of a loop from the collector to the emitter, where the loop includes vias of the PCB and the backvias of the semiconductor die, thereby including parasitic inductance of the vias and backvias within the loop. This allows a relatively high level of RF current to flow back to the emitter.
The parasitic inductance and resistance of the backvia of GaAs Die and vias in PCB limits the achievable output power, power added efficiency (PAE) and gain especially with higher operating frequency or larger transistor size which is used for higher output power. With the increasing operating frequency and transistor size (for higher output power), the ground parasitic inductance is becoming one of the major limitation of the power amplifier (PA) achievable output power, PAE.
The effect of this parasitic inductance of the vias and backvias is normally called “emitter degeneration of amplifiers” in Bipolar technology or “source degeneration of amplifiers” in CMOS technology. The RF current is directly fed back to the input signal decreasing the power gain, output power and PAE of the amplifier. Or put another way, resonance attributable to the parasitic inductance of the GaAs backvia and PCB via feeds back RF signal current to the emitter of the core transistor.
Additionally, the Quality factor (Q) of the matching capacitor in the output matching circuits can be limited when off-the-shelf capacitors are used for the matching capacitor. This may contribute to insertion loss, then decrease the output power, PAE and gain. For example, the commercial off-chip capacitor with ˜10 pF capacitance value has around Q of 30 and resonance frequency of 3.5 GHz. In some instances, the self-resonance frequency of the capacitor is too low for higher frequency power amplifiers. Accordingly, it would be desirable to have a power amplifier architecture that increases the PAE of the amplifier and uses components that have a higher Q.